test(pf-encode): measure the bits/frame curve — no crossover, split always wins
WP0's real deliverable, and the hole every previous measurement in this
programme had. All prior timings ran against driver-zeroed buffers, so rate
control had nothing to code (~300 B/AU against an 833 KB quota) and only the
PIXEL-proportional half of the encode cost was ever exercised -- while the 4K60
HDR field report was a BITS/FRAME problem at 6.8 Mbit/frame.
Adds `pf_zerocopy::cuda::write_plane_from_host`, the exact mirror of the existing
read_plane_to_host. No new loader entry was needed: cuMemcpy2DAsync_v2 was
already in the table and CUDA_MEMCPY2D just needed the reverse memory types.
Linux-only by construction (pf-zerocopy's `imp` is cfg'd to linux).
⚠ Two harness mistakes found and fixed by looking at bytes/AU rather than
trusting the knob:
- Pure per-pixel noise is INCOMPRESSIBLE, so a low bitrate target does not
produce low bits/frame -- it OVERSHOOTS. At a nominal 50 Mbps the encoder
emitted 719 KB/AU against a 104 KB quota, and the three lowest rows of the
first sweep all sat at the same ~5.7 Mbit/frame. Sweeping nominal bitrate
measures nothing.
- So the sweep moves CONTENT DETAIL (block size) instead, and the x-axis is the
bits/frame the encoder ACTUALLY produced, never the one requested.
4K60 HEVC 8-bit, real content, single-engine vs forced-2:
bits/frame Ada 4090 Blackwell 5070 Ti
0.2-0.3 Mb 4567 -> 2381 1.92x 5549 -> 3552 1.56x
~1.1-1.2 Mb 5060 -> 2626 1.93x 5867 -> 4082 1.44x
~3.3 Mb 8478 -> 4455 1.90x 9286 -> 5862 1.58x
~9.6 Mb 16237 -> 8114 2.00x 16435 -> 9275 1.77x
RESULTS. (1) Encode time scales strongly with bits/frame -- 4.6 ms to 16.2 ms
across the range on Ada -- confirming the hypothesis' core claim. (2) There is NO
CROSSOVER: split wins at every point on both architectures (Ada ~1.9-2.0x and
notably flat, Blackwell 1.44-1.77x). So the arbitration's encode-side answer is
essentially always "split", which makes the sub-frame handicap the only decision
that actually matters -- exactly the part already built and unit-pinned.
(3) It corroborates the field capture: at ~6.8 Mbit/frame these curves put
single-engine 4K60 around 10-13 ms, and the field report was 10.3 ms on a 4090.
That reads as real ASIC time, not the retrieve-queue inflation it might have been.
⚠ Caveat the data itself shows: cost is NOT monotonic in bits/frame alone. The
1px row lands at the HIGHEST bits/frame yet encodes FASTER than the 4px row on
both boxes (Ada 10148 vs 16237 us) -- pure noise defeats motion estimation, which
gives up early, where semi-structured content makes it search hard. Content
structure is a real term, so "bits/frame" is a good axis but not a complete cost
model.
Verified .21: clippy -D warnings clean (pf-encode + pf-zerocopy), 64 unit tests,
25/25 NVENC on-hardware. Curves run on both Ada and Blackwell. fmt clean.
This commit is contained in:
@@ -2754,6 +2754,60 @@ mod tests {
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enc.encoder_engines
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}
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/// An NV12 frame filled with **real high-entropy content**, not the zeroed VRAM every other
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/// helper here hands the encoder.
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///
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/// This matters more than it looks. Under CBR the rate controller spends its quota only if
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/// there is something to code; against uninitialised (driver-zeroed) buffers it emits ~300 B/AU
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/// where the configured rate wants ~833 KB, so every timing taken that way measures the
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/// PIXEL-proportional cost and is blind to the bits/frame regime — the regime the 4K60 HDR
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/// field report actually came from. A cheap xorshift per pixel plus a per-frame seed gives both
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/// spatial detail (so intra costs real bits) and inter-frame change (so P-frames cannot
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/// skip-code), which is what drives the entropy coder.
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/// `block` sets the spatial detail: 1 = per-pixel noise (incompressible — rate control
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/// OVERSHOOTS any low target), larger = blockier and cheaper to code. Sweeping it is how the
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/// bench reaches the LOW bits/frame end at all; pure noise cannot get there.
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fn noise_nv12_frame(w: u32, h: u32, i: u32, block: usize) -> CapturedFrame {
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let buf = DeviceBuffer::alloc_nv12(w, h).expect("alloc NV12 device buffer");
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let (uv_ptr, uv_pitch) = buf.uv.expect("NV12 buffer has a UV plane");
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let mut st = 0x2545_F491_4F6C_DD1Du64 ^ ((i as u64 + 1) << 32);
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let mut next = move || {
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st ^= st << 13;
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st ^= st >> 7;
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st ^= st << 17;
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st
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};
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let b = block.max(1);
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let mut plane = |pw: usize, ph: usize| -> Vec<u8> {
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let bw = pw.div_ceil(b);
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let cells: Vec<u8> = (0..(bw * ph.div_ceil(b)))
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.map(|_| (next() >> 24) as u8)
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.collect();
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let mut out = Vec::with_capacity(pw * ph);
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for y in 0..ph {
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let row = y / b * bw;
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for x in 0..pw {
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out.push(cells[row + x / b]);
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}
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}
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out
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};
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let y = plane(w as usize, h as usize);
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let uv = plane(w as usize, h as usize / 2);
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pf_zerocopy::cuda::write_plane_from_host(buf.ptr, buf.pitch, &y, w as usize, h as usize)
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.expect("upload Y plane");
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pf_zerocopy::cuda::write_plane_from_host(uv_ptr, uv_pitch, &uv, w as usize, h as usize / 2)
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.expect("upload UV plane");
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CapturedFrame {
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width: w,
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height: h,
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pts_ns: i as u64 * 16_666_667,
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format: PixelFormat::Nv12,
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payload: FramePayload::Cuda(buf),
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cursor: None,
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}
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}
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fn nv12_frame(w: u32, h: u32, i: u32) -> CapturedFrame {
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// Content is uninitialized device memory — NVENC encodes it fine; this smoke test asserts the
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// session/registration/encode/RFI machinery, not picture fidelity (that's the on-glass A/B).
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@@ -4050,6 +4104,99 @@ mod tests {
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std::env::remove_var("PUNKTFUNK_NVENC_SUBFRAME");
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}
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/// ON-HARDWARE — **THE BITS/FRAME CURVE**, the measurement this whole programme has been blind
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/// to (WP0's real deliverable).
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///
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/// Every other timing here was taken against driver-zeroed buffers, so rate control had
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/// nothing to code (~300 B/AU against an 833 KB quota) and only the PIXEL-proportional half of
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/// the encode cost was ever exercised. But the 4K60 HDR field report was a *bits/frame*
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/// problem — 6.8 Mbit/frame — and the central hypothesis is that split's benefit and the
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/// 10-bit veto's origin both live on that axis. [`noise_nv12_frame`] finally puts real entropy
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/// in front of the encoder.
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///
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/// Sweeps bitrate at a fixed mode, single-engine vs forced-2, and prints **bytes/AU alongside
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/// every timing** — without that column a run that silently undershoots its quota looks like a
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/// result instead of a non-measurement. Run on both boxes:
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/// cargo test -p pf-encode --features nvenc -- --ignored --test-threads=1 \
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/// nvenc_cuda_bits_per_frame_curve --nocapture
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#[test]
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#[ignore = "requires an NVIDIA GPU + driver — run manually (Ada .181 / Blackwell .21)"]
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fn nvenc_cuda_bits_per_frame_curve() {
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use std::time::Instant;
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const WARMUP: u32 = 10;
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const MEASURED: u32 = 24;
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let (w, h, fps) = std::env::var("PF_AB_MODE")
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.ok()
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.and_then(|s| {
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let p: Vec<u32> = s.split('x').filter_map(|v| v.parse().ok()).collect();
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(p.len() == 3).then(|| (p[0], p[1], p[2]))
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})
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.unwrap_or((3840, 2160, 60));
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std::env::set_var("PUNKTFUNK_NVENC_SUBFRAME", "0");
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pf_zerocopy::cuda::make_current().expect("shared CUDA context current");
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// Sweep CONTENT DETAIL, not nominal bitrate. Pure noise is incompressible, so a low
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// bitrate target simply overshoots (measured: 719 KB/AU against a 104 KB quota) and every
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// low row lands at the same high bits/frame — the exact blindness this test exists to fix.
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// Blockier content codes cheaper, so detail is what actually moves along the axis, and the
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// x-axis below is the bits/frame the encoder ACTUALLY produced, never the one requested.
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let bps: u64 = 600_000_000;
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println!(
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"bits/frame curve @ {w}x{h}@{fps} HEVC 8-bit, REAL content, {} Mbps cap:",
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bps / 1_000_000
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);
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println!(" detail | ACTUAL bits/frame | single | split-2 | ratio");
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for block in [64usize, 32, 16, 8, 4, 1] {
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let frames: Vec<CapturedFrame> =
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(0..4).map(|i| noise_nv12_frame(w, h, i, block)).collect();
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let run = |split: &str| -> (u128, usize) {
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std::env::set_var("PUNKTFUNK_SPLIT_ENCODE", split);
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let mut enc = NvencCudaEncoder::open(
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Codec::H265,
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PixelFormat::Nv12,
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w,
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h,
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fps,
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bps,
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true,
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8,
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ChromaFormat::Yuv420,
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false,
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4,
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)
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.expect("open NVENC CUDA session");
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let (mut times, mut bytes) = (Vec::new(), Vec::new());
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for i in 0..(WARMUP + MEASURED) {
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let t0 = Instant::now();
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enc.submit_indexed(&frames[(i % 4) as usize], i)
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.expect("submit");
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let mut got = 0usize;
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while let Some(au) = enc.poll().expect("poll") {
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got = au.data.len();
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}
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if i >= WARMUP {
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times.push(t0.elapsed().as_micros());
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bytes.push(got);
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}
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}
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enc.flush().ok();
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times.sort_unstable();
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bytes.sort_unstable();
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(times[times.len() / 2], bytes[bytes.len() / 2])
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};
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let (s_us, s_bytes) = run("0");
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let (p_us, _) = run("2");
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println!(
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" {block:>5}px | {:>10.2} Mbit | {s_us:>6}us | {p_us:>6}us | {:>4.2}×",
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s_bytes as f64 * 8.0 / 1e6,
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s_us as f64 / p_us.max(1) as f64
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);
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}
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std::env::remove_var("PUNKTFUNK_SPLIT_ENCODE");
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std::env::remove_var("PUNKTFUNK_NVENC_SUBFRAME");
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}
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/// A pre-session RFI request and nonsense ranges all correctly decline (→ caller forces IDR).
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/// Needs no GPU session (it short-circuits on the null encoder / range checks), so it runs in the
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/// normal suite — but `open` gates on the NVENC `.so`, so it skips gracefully where the NVIDIA
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@@ -62,6 +62,47 @@ pub fn read_plane_to_host(
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Ok(host)
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}
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/// Upload a tightly-packed host plane into a pitched device plane `(dst_ptr, dst_pitch)`.
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/// Synchronous on the priority stream. The exact mirror of [`read_plane_to_host`].
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///
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/// Not a hot path and never used by a session — this exists so ENCODE BENCHMARKS can put real,
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/// high-entropy content in front of the encoder. Every synthetic frame this crate could otherwise
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/// produce is uninitialised device memory, which the driver hands back **zeroed**; under CBR the
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/// rate controller then runs out of things to code and every measurement collapses into the
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/// low-bits/frame corner (~300 B/AU against an 833 KB quota, measured). That made the entire
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/// split-encode programme blind to the bits/frame regime, which is the regime the field report
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/// came from.
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pub fn write_plane_from_host(
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dst_ptr: CUdeviceptr,
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dst_pitch: usize,
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src: &[u8],
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width_bytes: usize,
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height: usize,
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) -> Result<()> {
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anyhow::ensure!(
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src.len() >= width_bytes * height,
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"write_plane_from_host: source is {} bytes, need {}",
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src.len(),
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width_bytes * height
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);
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let copy = CUDA_MEMCPY2D {
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srcMemoryType: 1, // CU_MEMORYTYPE_HOST
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srcHost: src.as_ptr() as *const c_void,
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srcPitch: width_bytes,
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dstMemoryType: CU_MEMORYTYPE_DEVICE,
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dstDevice: dst_ptr,
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dstPitch: dst_pitch,
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WidthInBytes: width_bytes,
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Height: height,
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..Default::default()
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};
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// SAFETY: mirrors `read_plane_to_host`. `©` is a live local `#[repr(C)] CUDA_MEMCPY2D`
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// outliving the synchronous call; `srcHost` addresses `src`, checked above to hold at least
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// `width_bytes*height` bytes, and `dstDevice`/`dstPitch` are the caller's live pitched device
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// plane. The copy is synchronous, so `src` need not outlive the call.
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unsafe { copy_blocking(©, "cuMemcpy2DAsync_v2(host->dev)") }
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}
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/// Export a device allocation (from `cuMemAllocPitch`/`cuMemAlloc`) as a cross-process CUDA IPC
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/// handle — an opaque 64-byte blob another process opens with [`ipc_open`]. The allocation must
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/// stay alive for as long as any importer has it open. The shared context must be current.
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Reference in New Issue
Block a user