4c3b11445c
Phase 0 of design/pyrowave-codec-plan.md — the opt-in wired-LAN ultra-low- latency codec. Vendored at upstream 509e4f88 (API 0.4.0, Granite 44362775, volk + vulkan-headers pins in PUNKTFUNK-VENDOR.txt), pruned to the 6.6 MB the standalone no-renderer build needs; scripts/vendor-pyrowave.sh reproduces the tree (a pin bump is protocol-affecting, plan §4.2). build.rs drives the wrapper CMakeLists (static archives incl. a static C-API lib upstream only ships shared) + bindgen over pyrowave.h; Linux and Windows only, empty stub elsewhere (Apple gets a native Metal port, §4.7). Offline-safe by construction: no network, no system lib, vendored Vulkan headers — same model as the opus dep (flatpak builder has no network). Phase-0 validation on .21 (RTX 5070 Ti, driver 610.43.03): - upstream pyrowave-c-test + interop test (incl. dmabuf/DRM-modifier Vulkan<->Vulkan) pass, from the pristine AND the pruned tree - GPU kernel times at ~1.6 bpp noise: encode/decode 0.090/0.042 ms @800p, 0.146/0.067 @1080p, 0.226/0.103 @1440p, 0.477/0.201 @4K — order of magnitude under NVENC's 1-2 ms retrieve, CBR lands within ~100 B of target - cargo test -p pyrowave-sys green (static link + API-version pin check) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
358 lines
10 KiB
C++
358 lines
10 KiB
C++
/* Copyright (c) 2017-2026 Hans-Kristian Arntzen
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include "cookie.hpp"
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#include "descriptor_set.hpp"
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#include "hash.hpp"
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#include "intrusive.hpp"
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#include "limits.hpp"
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#include "vulkan_headers.hpp"
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#include "enum_cast.hpp"
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namespace spirv_cross
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{
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struct SPIRType;
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}
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namespace Vulkan
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{
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class Device;
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enum class ShaderStage
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{
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Vertex = 0,
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Fragment = 4, // Skip over tess/geom to match Vulkan ordering.
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Compute,
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Task,
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Mesh,
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Count
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};
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struct ResourceLayout
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{
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DescriptorSetLayout sets[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t input_mask = 0;
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uint32_t output_mask = 0;
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uint32_t push_constant_size = 0;
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uint32_t spec_constant_mask = 0;
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uint32_t bindless_set_mask = 0;
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enum { Version = 7 };
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bool unserialize(const uint8_t *data, size_t size);
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bool serialize(uint8_t *data, size_t size) const;
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static size_t serialization_size();
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};
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static_assert(sizeof(DescriptorSetLayout) % 8 == 0, "Size of DescriptorSetLayout does not align to 64 bits.");
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struct CombinedResourceLayout
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{
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uint32_t attribute_mask = 0;
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uint32_t render_target_mask = 0;
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DescriptorSetLayout sets[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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uint32_t stages_for_bindings[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS] = {};
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uint32_t stages_for_sets[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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VkPushConstantRange push_constant_range = {};
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uint32_t descriptor_set_mask = 0;
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uint32_t bindless_descriptor_set_mask = 0;
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uint32_t spec_constant_mask[Util::ecast(ShaderStage::Count)] = {};
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uint32_t combined_spec_constant_mask = 0;
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Util::Hash push_constant_layout_hash = 0;
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};
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union CombinedImageSamplerIndex
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{
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struct
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{
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uint32_t image_heap_index : 20;
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uint32_t sampler_heap_index : 12;
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};
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uint32_t word;
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};
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static_assert(sizeof(CombinedImageSamplerIndex) == sizeof(uint32_t), "Unexpected size of CombinedImageSamplerIndex.");
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union ResourceBinding
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{
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VkDescriptorBufferInfo buffer;
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struct
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{
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VkDescriptorImageInfo fp;
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VkDescriptorImageInfo integer;
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const uint8_t *fp_ptr;
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const uint8_t *integer_ptr;
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const uint8_t *sampler_ptr;
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CombinedImageSamplerIndex fp_heap_index;
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CombinedImageSamplerIndex integer_heap_index;
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} image;
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VkDescriptorAddressInfoEXT buffer_addr_buffer;
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VkDeviceAddressRangeEXT buffer_addr_heap;
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VkAccelerationStructureKHR rtas;
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union
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{
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VkBufferView handle;
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struct
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{
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const uint8_t *ptr;
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uint32_t heap_index;
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} buffer;
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} buffer_view;
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};
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struct ResourceBindings
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{
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ResourceBinding bindings[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint64_t cookies[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint64_t secondary_cookies[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint8_t push_constant_data[VULKAN_PUSH_CONSTANT_SIZE];
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union
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{
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uint32_t push_data_words[(VULKAN_PUSH_DATA_SIZE - VULKAN_PUSH_CONSTANT_SIZE) / (VULKAN_NUM_DESCRIPTOR_SETS * sizeof(uint32_t))];
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VkDeviceAddress push_data_addr[(VULKAN_PUSH_DATA_SIZE - VULKAN_PUSH_CONSTANT_SIZE) / (VULKAN_NUM_DESCRIPTOR_SETS * sizeof(VkDeviceAddress))];
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} inline_descriptors[VULKAN_NUM_DESCRIPTOR_SETS];
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};
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struct ImmutableSamplerBank
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{
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const ImmutableSampler *samplers[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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static void hash(Util::Hasher &h, const ImmutableSamplerBank *bank);
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};
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class PipelineLayout : public HashedObject<PipelineLayout>
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{
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public:
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PipelineLayout(Util::Hash hash, Device *device, const CombinedResourceLayout &layout,
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const ImmutableSamplerBank *sampler_bank);
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~PipelineLayout();
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const CombinedResourceLayout &get_resource_layout() const
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{
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return layout;
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}
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// Legacy
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VkPipelineLayout get_layout() const
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{
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return pipe_layout;
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}
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DescriptorSetAllocator *get_allocator(unsigned set) const
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{
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return set_allocators[set];
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}
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VkDescriptorUpdateTemplate get_update_template(unsigned set) const
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{
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return update_template[set];
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}
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uint32_t get_push_set_index() const
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{
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return push_set_index;
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}
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// Heap
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enum class DescriptorStrategy
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{
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// For images: a u32 index. For buffers: PUSH_ADDRESS.
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Inline,
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// Not compatible with array of samplers or combined image samplers.
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// Not compatible with SSBO that need ArrayLength.
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HeapSlice,
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// Indirect version of inline, for larger sets.
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IndirectTable,
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};
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// Allocation size from indirection table UBO.
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uint32_t get_heap_table_size(uint32_t desc_set) const
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{
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return heap.heap_table_size[desc_set];
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}
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// Allocation size from descriptor heap.
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// Used when we want to copy descriptors straight into the heap.
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uint32_t get_heap_slice_size(uint32_t desc_set) const
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{
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return heap.heap_slice_size[desc_set];
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}
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uint32_t get_descriptor_set_push_buffer_offset(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.push_buffer_offsets[desc_set];
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}
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uint32_t get_descriptor_set_push_image_offset(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.push_image_offsets[desc_set];
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}
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uint32_t get_descriptor_set_inline_offsets(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.push_inline_offsets[desc_set];
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}
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uint32_t get_descriptor_set_inline_size(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.push_inline_size[desc_set];
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}
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DescriptorStrategy get_heap_buffer_descriptor_strategy(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.buffer_strategies[desc_set];
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}
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DescriptorStrategy get_heap_image_descriptor_strategy(uint32_t desc_set) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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return heap.image_strategies[desc_set];
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}
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// Inline: local offset into inline push data
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// HeapSlice: offset into allocated heap slice
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// IndirectTable: offset into indirect table
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uint32_t get_descriptor_offset(uint32_t desc_set, uint32_t binding) const
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{
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VK_ASSERT(desc_set < VULKAN_NUM_DESCRIPTOR_SETS);
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VK_ASSERT(binding < VULKAN_NUM_BINDINGS);
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return heap.desc_offsets[desc_set][binding];
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}
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// Passed directly to CreatePipeline.
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const std::vector<VkDescriptorSetAndBindingMappingEXT> &get_heap_mappings() const
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{
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return heap.mappings;
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}
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private:
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Device *device;
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VkPipelineLayout pipe_layout = VK_NULL_HANDLE;
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CombinedResourceLayout layout;
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DescriptorSetAllocator *set_allocators[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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VkDescriptorUpdateTemplate update_template[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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uint32_t push_set_index = UINT32_MAX;
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void create_update_templates();
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void init_heap();
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void init_heap(uint32_t set_index);
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void init_heap_buffers(uint32_t set_index);
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void init_heap_image(uint32_t set_index);
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void init_heap_offsets(uint32_t set_index);
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void init_legacy(const ImmutableSamplerBank *immutable_samplers);
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struct
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{
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std::vector<VkDescriptorSetAndBindingMappingEXT> mappings;
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// Inline descriptors are packed together.
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uint32_t push_inline_offsets[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t push_inline_size[VULKAN_NUM_DESCRIPTOR_SETS];
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// For tables and slices.
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uint32_t push_buffer_offsets[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t push_image_offsets[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t heap_table_size[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t heap_slice_size[VULKAN_NUM_DESCRIPTOR_SETS];
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DescriptorStrategy buffer_strategies[VULKAN_NUM_DESCRIPTOR_SETS];
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DescriptorStrategy image_strategies[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t desc_offsets[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint32_t push_data_size;
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} heap = {};
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};
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class Shader : public HashedObject<Shader>
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{
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public:
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Shader(Util::Hash binding, Device *device, const uint32_t *data, size_t size,
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const ResourceLayout *layout = nullptr);
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~Shader();
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const ResourceLayout &get_layout() const
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{
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return layout;
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}
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VkShaderModule get_module() const
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{
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return module;
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}
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static bool reflect_resource_layout(ResourceLayout &layout, const uint32_t *spirv_data, size_t spirv_size);
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static const char *stage_to_name(ShaderStage stage);
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static Util::Hash hash(const uint32_t *data, size_t size);
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private:
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Device *device;
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VkShaderModule module = VK_NULL_HANDLE;
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ResourceLayout layout;
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};
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struct Pipeline
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{
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VkPipeline pipeline;
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uint32_t dynamic_mask;
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};
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class Program : public HashedObject<Program>
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{
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public:
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Program(Device *device, Shader *vertex, Shader *fragment, const ImmutableSamplerBank *sampler_bank);
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Program(Device *device, Shader *task, Shader *mesh, Shader *fragment, const ImmutableSamplerBank *sampler_bank);
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Program(Device *device, Shader *compute, const ImmutableSamplerBank *sampler_bank);
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~Program();
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inline const Shader *get_shader(ShaderStage stage) const
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{
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return shaders[Util::ecast(stage)];
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}
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void set_pipeline_layout(const PipelineLayout *new_layout)
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{
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layout = new_layout;
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}
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const PipelineLayout *get_pipeline_layout() const
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{
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return layout;
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}
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Pipeline get_pipeline(Util::Hash hash) const;
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Pipeline add_pipeline(Util::Hash hash, const Pipeline &pipeline);
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void promote_read_write_to_read_only();
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private:
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void set_shader(ShaderStage stage, Shader *handle);
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Device *device;
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Shader *shaders[Util::ecast(ShaderStage::Count)] = {};
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const PipelineLayout *layout = nullptr;
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VulkanCache<Util::IntrusivePODWrapper<Pipeline>> pipelines;
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void destroy_pipeline(const Pipeline &pipeline);
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};
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}
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