perf(build): enable ARMv8 hardware AES-GCM — every aarch64 client ran software crypto
RustCrypto aes 0.8.x and polyval 0.6.x gate their ARMv8 AES / PMULL paths behind --cfg aes_armv8 / --cfg polyval_armv8 on aarch64 (x86_64 runtime-detects AES-NI with no flag, which is why hosts never showed it). Without the cfgs every Apple and Android client decrypted the media plane in SOFTWARE: 240 MiB/s/core measured on an M3 Ultra — 7 µs per 1.4 KB datagram, single-handedly capping receive throughput at ~1.57 Gbps wire on both host pairs. Workspace .cargo/config.toml sets both cfgs for cfg(target_arch = "aarch64"); detection stays runtime (cpufeatures) with a safe soft fallback. open_in_place: 240 MiB/s -> 2.42 GiB/s (10.3x). Live sweep .173 -> M3 Ultra over 10GbE: ceiling 1572 -> 4830 Mbps wire, zero loss through a 3.5 Gbps target; the .21 pair now saturates its physical 2.4 Gbps fabric exactly. No in-tree build path sets RUSTFLAGS (xcframework + gradle checked), so the config reaches all client builds; a lane that sets RUSTFLAGS overrides config rustflags entirely and must carry the cfgs itself (noted in the file). Shipping Apple/Android binaries stay on software crypto until rebuilt. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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# Workspace-wide build flags.
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#
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# aes_armv8: RustCrypto's `aes` 0.8.x enables ARMv8-Crypto hardware AES on aarch64 only behind
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# this cfg (x86_64 AES-NI is runtime-detected with no flag; the 0.9 line will make aarch64
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# automatic too). Without it every aarch64 client (all Apple + virtually all Android) ran
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# SOFTWARE AES on the per-packet decrypt path — measured 2026-07-14 on an M3 Ultra at
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# ~240 MiB/s/core (~7 µs per 1.4 KB datagram), which single-handedly capped receive throughput
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# at ~1.57 Gbps wire. The cfg still runtime-detects via `cpufeatures`, so a chip without the
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# extensions falls back safely.
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#
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# NOTE: a RUSTFLAGS environment variable OVERRIDES config rustflags entirely — build scripts /
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# CI lanes that set RUSTFLAGS for aarch64 targets (cargo-ndk, xcframework) must carry
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# `--cfg aes_armv8` themselves.
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# polyval_armv8: same story for GCM's other half — `polyval` 0.6.x gates its PMULL (carry-less
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# multiply) GHASH path behind this cfg on aarch64. AES alone took open_in_place from 240 to
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# ~790 MiB/s on the M3 Ultra; software GHASH still dominated until this flag joined it.
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[target.'cfg(target_arch = "aarch64")']
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rustflags = ["--cfg", "aes_armv8", "--cfg", "polyval_armv8"]
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